Author: Ciletti, Michael D.
Prentice Hall Xilinx Design Series; Hardback; Book
Published: November 2002
Pearson Higher Education
ISBN: 0130891614
This item non-returnable. Order may not be canceled.

This new guide covers the key design problems of modeling, architectural tradeoffs, functional verification, timing analysis, test generation, fault simulation, design for testability, logic synthesis, and postsynthesis verification. The author's focus is on developing, verifying, and synthesizing designs of digital circuits rather than on the Verilog language.Aimed at advanced courses in digital design for seniors and first-year graduate students in electrical engineering, computer engineering, and computer science, this book assumes and builds on the background of a first course in logic design.